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M.Tech Research Thesis {Colloquium} ONLINE: CDS: 22nd July 2021 : ” Static and Dynamic Monitoring of Program Flow in REDEFINE Many-Core Processor”

22 Jul @ 2:00 PM -- 3:00 PM

DEPARTMENT OF COMPUTATIONAL AND DATA SCIENCES
M.Tech Research  Thesis Colloquium

 

Speaker                : Ms.  Pushpa Baral

S.R. Number        : 06-18-02-91-22-18-1-16356

Title                      : “Static and Dynamic Monitoring of Program Flow in REDEFINE Many-Core Processor“​

Date & Time        : July 22, 2021 (Thursday), 02:00 PM

Venue                   : Online

ABSTRACT

Manycore heterogeneous architectures are becoming the promising choice for high-performance computing application. Multiple parallel tasks run concurrently across different processor cores sharing the same communication and memory resources, thus providing high performance and throughput. But, with the increase in the number of cores, the complexity of the system also increases. Such systems provide very limited visibility of internal processing behaviour. This poses a challenge for a software developer as it is difficult to monitor the program in execution. Monitoring the program behaviour is required for exploiting the architecture to maximum, debugging, security, performance analysis, and so on.

REDEFINE is one such macro dataflow execution based manycore co-processor designed to accelerate the compute-intensive part of an application.  In this work, we propose a static and dynamic monitoring framework in REDEFINE.  First, we present software instrumentation based approach to generate the execution traces with negligible hardware overhead. The generated trace data is processed through an offline analysis tool to get the execution graph. This graph can be utilized to analyse the program behaviour statically. Although this approach is flexible and easy to implement, the offline analysis might result in delayed detection of any unexpected program behaviour. To address this, we then present a run-time monitoring framework. In this approach, a separate hardware monitoring unit runs in parallel to the processor core. The monitor is programmed with the monitoring graph obtained from static analysis of the program binary. It matches the instructions executed with the corresponding information in the monitoring graph and flags any unintended program behaviour. This aids in the identification of any intrusion or attack that alters the control flow integrity of the program executed and further helps in the realisation of a secure computing platform that is a primary requirement today in the area of 5G network processing, autonomous vehicles and avionics applications.

Details

Date:
22 Jul
Time:
2:00 PM -- 3:00 PM

Venue

Online